In an existing array substrate, pixel electrodes and common electrodes lines are often overlapped to foul′ storing capacitors. A common electrode line refers to a metal line/wire connected to a common electrode. For example, a common electrode line may be disposed at the via hole that connects the drain of the driving thin-film transistor (TFT) and the pixel electrode, so that the common electrode line may have overlapping areas with the pixel electrode. Storing capacitors may be formed between the pixel electrode and the common electrode line.
However, the area of the pixel electrode corresponding to a via hole is often limited, so that the common electrode line requires a greater width to form storing capacitors with higher capacitance. Also, it is difficult to obtain both a desired aperture ratio and storing capacitors with desired capacitance in an existing array substrate.